IDA Disassemblies Gallery
Hitachi SH-3 Processor : Windows CE PE format
Assembler code
.text:100011B4 ; Exported entry 1. CreateTransport
.text:100011B4
.text:100011B4 ; =============== S U B R O U T I N E =======================================
.text:100011B4
.text:100011B4
.text:100011B4 .export CreateTransport
.text:100011B4 CreateTransport: ; DATA XREF: .rdata:off_100021C8↓o
.text:100011B4 ; .pdata:10004028↓o
.text:100011B4 sts.l pr, @-r15
.text:100011B6 add #-h'10, r15
.text:100011B8 mov.l #??2@YAPAXI@Z, r0 ; operator new(uint)
.text:100011BA jsr @r0 ; ??2@YAPAXI@Z ; operator new(uint)
.text:100011BC mov #h'1C, r4
.text:100011BE mov r0, r4
.text:100011C0 tst r4, r4
.text:100011C2 bt loc_100011CC
.text:100011C4 bsr sub_10001190
.text:100011C6 nop
.text:100011C8 bra loc_100011CE
.text:100011CA mov r0, r4
.text:100011CC ; ---------------------------------------------------------------------------
.text:100011CC
.text:100011CC loc_100011CC: ; CODE XREF: CreateTransport+E↑j
.text:100011CC mov #0, r4
.text:100011CE
.text:100011CE loc_100011CE: ; CODE XREF: CreateTransport+14↑j
.text:100011CE mov r4, r0
.text:100011D0 add #h'10, r15
.text:100011D2 lds.l @r15+, pr
.text:100011D4 rts
.text:100011D6 nop
.text:100011D6 ; ---------------------------------------------------------------------------
.text:100011D8 off_100011D8: .data.l ??2@YAPAXI@Z ; DATA XREF: CreateTransport+4↑r
.text:100011D8 ; operator new(uint)
.text:100011DC off_100011DC: .data.l off_10002030 ; DATA XREF: sub_100011A8+4↑r